Alif Semiconductor /AE302F80F55D5AE_CM55_HE_View /ETH /ETH_MAC_TIMESTAMP_EGRESS_LATENCY

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Interpret as ETH_MAC_TIMESTAMP_EGRESS_LATENCY

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ETLSNS0ETLNS

Description

Egress MAC latency Register

Fields

ETLSNS

Egress Timestamp Latency, in sub-nanoseconds This register holds the average latency in sub-nanoseconds between the actual point (RMII) where the egress timestamp is taken and the output ports (ETH_TXD[1-0]) of the MAC.

ETLNS

Egress Timestamp Latency, in nanoseconds This register holds the average latency in nanoseconds between the actual point (RMII) where the egress timestamp is taken and the output ports (ETH_TXD[1-0]) of the MAC.

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